Inferred state machines in VHDL (vs 2-process-machines of all things!)

A few weeks ago I read a [blog post](http://blogs.msdn.com/b/satnam_singh/archive/2011/02/15/compiling-c-programs-to-fpga-circuits-an-ethernet-packing-processing-example.aspx ) by the illustrious MS researcher Prof. Satnam Singh. He writes about his [Kiwi](http://research.microsoft.com/en-us/people/satnams/) project which he describes as “[trying] to civilise hardware design” – as compared to the explicit writing of state machines.

His example is a Ethernet processor which simply swaps the source and destination MAC addresses over and retransmits them. He has code in C#, and it looks a lot like the inferred state machine style of VHDL I’ve been toying with for a while.

So (finally) I’ve toyed…

Published
Categorised as Uncategorised Tagged